Advanced Design, Partitioning and Test for System-in-Package Electronics
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System-in-Package Seminar
14th June 2007
TWI, Great Abington, Cambridge

A joint NMI, TWI seminar covering technical and commercial aspects of this rapidly growing, high density, high performance and low cost-per-function packaging technology for microelectronics systems integration

Presentations include:
Keynote: New developments and applications for SiP, Tim Lenihan and Jan Vardaman, TechSearch International
Industrial perspectives in System-in-Package, Brad Factor, ASE
System-in-Package design methodologies, Gary Hinde, Cadence
System-in-Package manufacturing solutions, Bernie Ramsay, UNISEM
System-in-Package with silicon integrated passives, Alain Rougier, NXP
SiP solutions in the medical arena, Piers Tremlett, Zarlink Semiconductor
SiP technologies and wireless communications, Andrew Holland, CSR
Advanced design, partitioning and test for SiP, David Pedder, TWI
System-in-Package substrate options, Bob Hunt, CMAC

FLYER & PROGRAMME DETAIL

Who should attend?
System designers, device designers, packaging and interconnection engineers, technology developers, manufacturing, device and systems applications engineers in the electronics, photonics and sensors industries

The fee for this seminar is £75.00 + VAT
For further information please contact rachel.wall@twi.co.uk
or visit www.eventsforce.net/07SIP  to register online


Sponsored by


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Last updated
Monday, 30 Apr 2007

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A UK research project under the
DTI Technology Programme