The ADEPT-SiP project is directed at the development and demonstration of a rigorous, right-first-time design and supply chain management methodology for novel System-in-Package Electronics Product Functions. The project will address schematic capture, partitioning and active device, substrate and package design to meet specific performance, cost, size and weight targets. Other key design stages will include thermal and EMC design, and design-for-manufacture, test, reliability and for environmental impact. Novel, high density embedded passive substrate technologies will be designed and simulated, process characterisation undertaken and parameterised component models developed for the full range of passive components and interconnection and assembly structures. The core design, simulation and modelling activities will be proven in System-in-Package technology demonstrators.

The objective of the ADEPT-SiP project is to develop and demonstrate a rigorous, right-first-time design and supply chain management methodology for novel System-in-Package Electronics Product Functions. This new technology promises size and weight reductions over todays pcb based electronic functions of 2 to 10 fold coupled with costs reductions of up to a factor of two. The SiP concept also allows the mixing of the optimum active and passive device technologies for improved performance, for example in power reduction and improved noise performance. SiP technology, coupled with the use of embedded passive components, is now being heralded as the next step in electronics systems integration technology beyond Surface Mount and will have a major impact on the way electronics products are designed and delivered over the next 3 to 10 years. This project is therefore very timely and will have a significant impact on the technical, commercial and competitive position of the UK partners over this time frame.

The main project deliverables include a rigorous, right-first-time SiP design methodology including schematic capture, partitioning and active device, substrate and package design, thermal and EMC design, design for manufacture, for test, for reliability and for environmental impact. Other deliverables include technology test vehicles for characterisation, model derivation and verification, technology and component models, embedded passives parameterised component models and design toolkit, a supply chain management methodology and SiP demonstrators in the digital, mixed signal and RF applications areas.